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DG408L/409L Vishay Siliconix Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers DESCRIPTION The DG408L/409L are low voltage pin-for-pin compatible companion devices to the industry standard DG408/409 with improved performance. Using BiCMOS wafer fabrication technology allows the DG408L/409L to operate on single and dual supplies. Single supply voltage ranges from 3 to 12 V while dual supply operation is recommended with 3 to 6 V. The DG408L is an 8 Channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3 bit binary address (A0, A1, A2). The DG409L is a dual 4 Channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2 bit binary address (A0, A1). Break-before-make switching action to protect against momentary crosstalk between adjacent channels. The DG408L/409L provides lower on-resistance, faster switching time, lower leakage, less power consumption and higher off-Isolation than the DG408/409. FEATURES * Pin-For-Pin compatibility with DG408/409 * 2.7- to 12 V Single Supply or 3 to 6 V Dual Supply Operation * Lower On-Resistance: rDS(on) - 17 Typ. * Fast Switching: tON - 38 ns, tOFF - 18 ns * Break-Before-Make Guaranteed * Low Leakage: IS(off) - 0.2 nA Max. * Low Charge Injection: 1 pC * TTL, CMOS, LV Logic (3 V) Compatible * - 82 dB Off-Isolation at 1 MHz * 2000 V ESD Protection (HBM) Pb-free Available RoHS* COMPLIANT BENEFITS * * * * High Accuracy Single and Dual Power Rail Capacity Wide Operating Voltage Range Simple Logic Interface APPLICATIONS * * * * * * * Data Acquisition Systems Battery Operated Equipment Portable Test Equipment Sample and Hold Circuits Communication Systems SDSL, DSLAM Audio and Video Signal Routing FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS DG408L Dual-In- Line, SOIC and TSSOP A0 EN VS1 S2 S3 S4 D A1 A2 GND V+ S5 S6 S7 S8 DG409L Dual-In- Line, SOIC and TSSOP A0 A1 GND V+ S1b S2b S3b S4b Db 1 2 3 4 5 6 7 8 Top View Decoders/Drivers 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 Top View Decoders/Drivers 16 15 14 13 12 11 10 9 EN VS1a S2a S3a S4a Da * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 71342 S-71241-Rev. E, 25-Jun-07 www.vishay.com 1 DG408L/409L Vishay Siliconix TRUTH TABLE - DG408L A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 1 0 1 1 1 1 1 1 1 On Switch None 1 2 3 4 5 6 7 8 TRUTH TABLE - DG409L A1 X 0 0 1 1 A0 X 0 1 0 1 EN 0 1 1 1 1 On Switch None 1 2 3 4 Logic "0" = VAL 0.8 V Logic "1" = VAH 2.4 V X = Do not Care For low and high voltage levels for VAX and VEN consult "Digital Control" parameters for specific V+ operation. ORDERING INFORMATION - DG408L Temp Range Package Part Number DG408LDY DG408LDY-E3 DG408LDY-T1 DG408LDY-T1-E3 ORDERING INFORMATION - DG409L Temp Range Package Part Number DG409LDY DG409LDY-E3 DG409LDY-T1 DG409LDY-T1-E3 DG409LDQ DG409LDQ-E3 DG409LDQ-T1 DG409LDQ-T1-E3 16-Pin SOIC - 40 to 85 C 16-Pin TSSOP 16-Pin SOIC - 40 to 85 C DG408LDQ DG408LDQ-E3 DG408LDQ-T1 DG408LDQ-T1-E3 16-Pin TSSOP ABSOLUTE MAXIMUM RATINGS Parameter Voltage Referenced V+ to VGND Digital Inputs , VS, VD Current (Any Terminal) Peak Current, S or D (Pulsed at 1 ms, 10 % Duty Cycle Max) Storage Temperature (A Suffix) (D Suffix) 16-Pin Plastic TSSOPc Power Dissipation (Package)b 16-Pin Narrow SOIC 16-Pin CerDIP LCC-20e d c a Limit 14 7 (V-) - 0.3 to (V) + 0.3 30 100 - 65 to 150 - 65 to 125 650 600 900 750 Unit V mA C mW Notes: a. Signals on SX, DX, AX, or EN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 7.6 mW/C above 75 C. d. Derate 12 mW/C above 75 C. e. Derate 10 mW/C above 75 C. www.vishay.com 2 Document Number: 71342 S-71241-Rev. E, 25-Jun-07 DG408L/409L Vishay Siliconix SPECIFICATIONS (SINGLE SUPPLY 12 V) Test Conditions Unless Otherwise Specified V+ = 12 V, 10 %, V- = 0 V Parameter Analog Switch Analog Signal Rangee Drain-Source On-Resistance rDS(on) Matching Between Channelsg On-Resistance Flatnessi VANALOG rDS(on) rDS rFLAT(on) IS(off) Switch Off Leakage Current ID(off) Channel On Leakage Current Digital Control Logic High Input Voltage Logic Low Input Voltage Input Current Dynamic Characteristics Transition Time tTRANS VS1 = 8 V, VS8 = 0 V, (DG408L) VS1b = 8 V, VS4b = 0 V, (DG409L) See Figure 2 VS(all) = VDA = 5 V See Figure 4 VAX = 0 V, VS1 = 5 V (DG408L) VAX = 0 V, VS1b = 5 V (DG409L) See Figure 3 CL = 1 nF, VGEN = 0 V, RGEN = 0 f = 100 kHz, RL = 1 k f = 1 MHz, VS = 0 V, VEN = 0 V f = 1 MHz, VD = 2.4 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 2.4 V (DG409L only) Room Full Room Full Room Full Room Full Room Room Room Room Room Room 30 60 68 1 55 60 25 35 5 1 ns 38 18 1 - 70 - 82 7 20 31 pF 55 60 25 30 5 pC dB 60 65 VINH VINL IIN VAX = VEN = 2.4 V or 0.8 V Full Full Full - 1.5 2.4 0.8 1.5 -1 2.4 0.8 1 V A ID(on) VD = 10.8 V, VD = 2 V or 9 V, IS = 10 mA Sequence Each Switch On VD = 10.8 V, VD = 2 V or 9 V IS = 10 mA Full Room Full Room Room Room Full Room Full Room Full 17 0 12 29 38 3 7 -1 - 15 -1 - 15 -1 - 15 1 15 1 15 1 15 -1 - 10 -1 - 10 -1 - 10 0 12 29 35 3 7 1 10 1 10 1 10 nA V Symbol VEN = 0.8 V or 2.4 Vf Tempb Typd A Suffix - 55 to 125 C Minc Maxc D Suffix - 40 to 85 C Minc Maxc Unit 1 3 VEN = 0 V, VD = 11 V or 1 V VS = 1 V or 11 V VS = VD = 1 V or 11 V Break-Before-Make Time Enable Turn-On Time Enable Turn-Off Time Charge Injectione Off Isolatione, h Crosstalke Source Off Capacitancee Drain Off Capacitance Drain On e tOPEN tON(EN) tOFF(EN) Q OIRR XTALK CS(off) CD(off) CD(on) 11 Capacitancee Power Supplies Power Supply Range Power Supply Current V+ I+ VEN = VA = 0 V or 5 V Room 0.2 3 12 0.7 3 12 0.7 V mA Notes: a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 C, Full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. rDS(on) = rDS(on) Max - rDS(on) Min. h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin. i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal. Document Number: 71342 S-71241-Rev. E, 25-Jun-07 www.vishay.com 3 DG408L/409L Vishay Siliconix SPECIFICATIONS (DUAL SUPPLY V+ = 5 V, V = 5 V) Test Conditions Unless Otherwise Specified V+ = 5 V, 10 %, V- = - 5 V, V- = 0 V Parameter Analog Switch Analog Signal Rangee Drain-Source On-Resistance VANALOG rDS(on) IS(off) Switch Off Leakage Currenta ID(off) Channel On Leakage Currenta Digital Control Logic High Input Voltage Logic Low Input Voltage Input Currenta Dynamic Characteristics Transition Timee Break-Before-Make Timee Enable Turn-On Timee Enable Turn-Off Timee Source Off Capacitancee Drain Off Capacitancee Drain On Capacitancee tTRANS VS1 = 3.5 V, VS8 = - 3.5 V, (DG408L) VS1b = 3.5 V, VS4b = - 3.5 V, (DG409L) See Figure 2 VS(all) = VDA = 3.5 V See Figure 4 VAX = 0 V, VS1 = 3.5 V (DG408L) VAX = 0 V, VS1b = 3.5 V (DG409L) See Figure 3 f = 1 MHz, VS = 0 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 2.4 V Room Full Room Full Room Full Room Full Room Room Room 30 60 78 1 55 68 40 50 1 ns 25 20 6 15 29 pF 55 60 40 45 60 65 VINH VINL IIN VAX = VEN = 2.4 V or 0.6 V Full Full Full - 1.5 2.4 0.6 1.5 -1 2.4 0.6 1 V A ID(on) VD = 3.5 V, IS = 10 mA Sequence Each Switch On V+ = 5.5 , V- = 5.5 V VEN = 0 V, VD = 4.5 V, VS = Full Room Full Room Full 4.5 V 20 -1 - 15 -1 - 15 -1 - 15 -5 5 40 50 1 15 1 15 1 15 -1 - 10 -1 - 10 -1 - 10 -5 5 40 50 1 10 1 10 1 10 nA V Symbol VEN = 0.6 V or 2.4 Vf Tempb Typd A Suffix - 55 to 125 C Minc Maxc D Suffix - 40 to 85 C Minc Maxc Unit tOPEN tON(EN) tOFF(EN) CS(off) CD(off) CD(on) Notes: a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 C, Full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. rDS(on) = rDS(on) Max - rDS(on) Min. h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin. i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal. www.vishay.com 4 V+ = 5.5 V, V- = - 5.5 V VEN = 2.4 V, VD = 4.5 V, VS = Room Full Room Full 4.5 V 8 Document Number: 71342 S-71241-Rev. E, 25-Jun-07 DG408L/409L Vishay Siliconix SPECIFICATIONS (SINGLE SUPPLY 5 V) Test Conditions Unless Otherwise Specified V+ = 5 V, 10 %, V- = 0 V Parameter Analog Switch Analog Signal Rangee Drain-Source On-Resistance rDS(on) Matching Between Channelsg On-Resistance Flatnessi Currenta ID(off) Channel On Leakage Currenta Digital Control Logic High Input Voltage Logic Low Input Voltage Input Currenta Dynamic Characteristics Transition Timee Break-Before-Make Timee Enable Turn-On Timee Enable Turn-Off Timee Charge Injectione Off Isolatione, h Crosstalke Source Off Capacitancee Drain Off Capacitance Drain On e A Suffix - 55 to 125 C Tempb Full Typd Minc 0 35 Maxc 5 49 62 3 4 -1 - 15 -1 - 15 -1 - 15 2.4 0.6 - 1.5 1.5 1 15 1 15 1 15 D Suffix - 40 to 85 C Minc 0 Maxc 5 40 62 3 4 -1 - 10 -1 - 10 -1 - 10 2.4 0.6 -1 1 1 10 1 10 1 10 nA Unit V Symbol VANALOG rDS(on) rDS rFLAT(on) IS(off) VEN = 0.6 V or 2.4 Vf V+ = 4.5 V, VD or VS = 1 V or 3.5 V, ID = 5 mA V+ = 4.5 V, VD = 1 V or 3.5 V, IS = 5 mA Room Full Room Room Room Full Room Full Room Full Full Full Full 1.5 Switch Off Leakage V+ = 5.5 V, VS = 1 V or 4 V VD = 4 V or 1 V V+ = 5.5 V, VD = VS = 1 V or 4 V Sequence Each Switch On ID(on) VINH VINL IIN V+ = 5 V VAX = VEN = 2.4 V or 0.6 V VS1 = 3.5 V, VS8 = 0 V, (DG408L) VS1b = 3.5 V, VS4b = 0 V, (DG409L) See Figure 2 VS(all) = VDA = 3.5 V, See Figure 4 VAX = 0 V, VS1 = 3.5 V (DG408L) VAX = 0 V, VS1b = 3.5 V (DG409L) See Figure 3 CL = 1 nF, RGEN = 0 , VGEN = 0 f = 100 kHz, RL = 1 k f = 1 MHz, VS = 0 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 2.4 V (DG409L only) V A tTRANS Room Full Room Full Room Full Room Full Room Room Room Room Room Room 44 125 138 1 60 70 45 60 5 1 125 135 tOPEN tON(EN) tOFF(EN) Q OIRR XTALK CS(off) CD(off) CD(on) 17 43 26 1 - 70 - 80 8 21 32 ns 60 65 45 50 5 pC dB pF Capacitancee Notes: a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 C, Full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. rDS(on) = rDS(on) Max - rDS(on) Min. h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin. i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal. Document Number: 71342 S-71241-Rev. E, 25-Jun-07 www.vishay.com 5 DG408L/409L Vishay Siliconix SPECIFICATIONS (SINGLE SUPPLY 3 V) Test Conditions Unless Otherwise Specified V+ = 3 V, 10 %, V- = 0 V VEN = 0.4 V or 2.0 Vf A Suffix - 55 to 125 C Tempb Full V+ = 2.7 V, VD = 0.5 or 2.2 V, IS = 5 mA V+ = 3.3 V, VS = 2 or 1 V, VD = 1 or 2 V ID(off) Channel On Leakage Currenta Digital Control Logic High Input Voltage Logic Low Input Voltage Input Currenta Dynamic Characteristics Transition Time Break-Before-Make Time Enable Turn-On Time Enable Turn-Off Time Charge Injectione Off Isolation Crosstalke Source Off Capacitancee Drain Off Capacitance Drain On e e, h D Suffix - 40 to 85 C Minc 0 Maxc 3 80 100 -1 - 10 -1 - 10 -1 - 10 2 1 10 1 10 1 10 nA Unit V Parameter Analog Switch Analog Signal Rangee Drain-Source On-Resistance Symbol VANALOG rDS(on) IS(off) Typd Minc 0 Maxc 3 80 105 Room Full Room Full Room Full Room Full Full Full 60 -1 - 15 -1 - 15 -1 - 15 2 Switch Off Leakage Currenta 1 15 1 15 1 15 ID(on) V+ = 3.3 V, VD = VS = 1 or 2 V Sequence Each Switch On VINH VINL IIN VAX = VEN = 2.4 V or 0.4 V VS1 = 1.5 V, VS8 = 0 V, (DG408L) VS1b = 1.5 V, VS4b = 0 V, (DG409L) See Figure 2 VS(all) = VDA = 1.5 V, See Figure 4 VAX = 0 V, VS1 = 1.5 V (DG408L) VAX = 0 V, VS1b = 1.5 V (DG409L) See Figure 3 CL = 1 nF, RGEN = 0 , VGEN = 0 V RL = 1 k, f = 100 kHz f = 1 MHz, VS = 0 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 0 V f = 1 MHz, VD = 0 V, VEN = 2 V (DG409L only) 0.4 - 1.5 1.5 -1 0.4 1 V A Full tTRANS tOPEN tON(EN) tOFF(EN) Q OIRR XTALK CS(off) CD(off) CD(on) Room Full Room Full Room Full Room Full Room Room Room Room Room Room 75 32 70 55 0.4 - 70 - 79 8 19 33 1 150 175 1 150 175 ns 95 115 100 115 5 95 105 100 105 5 pC dB pF Capacitancee Notes: a. Leakage parameters are guaranteed by worst case test condition and not subject to production test. b. Room = 25 C, Full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function. g. rDS(on) = rDS(on) Max - rDS(on) Min. h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin. i. rDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 6 Document Number: 71342 S-71241-Rev. E, 25-Jun-07 DG408L/409L Vishay Siliconix TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 80 rDS(on) - Drain-Source On-Resistnace () 70 60 50 40 30 20 10 0 0 2 4 6 8 10 12 V+ = 4.5 V V+ = 12 V V+ = 2.7 V rDS(on) - Drain-Source On-Resistnace () 25 20 V+ = 5 V V- = - 5 V 15 10 5 0 -5 -3 -1 1 3 5 VD - Drain Voltage (V) VD - Drain Voltage (V) rDS(on) vs. VD and Power Supply 1.8 1.6 1.4 1.2 VT (V) 1.0 0.8 0.6 0.4 0.2 0.0 0 2 4 6 8 10 12 14 V+ - Positive Supply Voltage (V) Low Threshold Limit rDS(on) - Drain-Source On-Resistnace () Upper Threshold Limit 50 rDS(on) vs. VD and Power Supply 85 C 40 125 C 30 25 C - 55 C 20 10 0 0 1 2 3 4 5 6 VD - Drain Voltage (V) Input Threshold vs. V+ Supply Voltage 35 rDS(on) - Drain-Source On-Resistnace () 30 85 C 125 C Switching Speed (nS) 25 20 25 C 15 10 5 0 -6 -4 -2 0 2 4 6 VD - Drain Voltage (V) - 55 C 50 40 70 60 rDS(on) vs. VD and Temperature tTRANS 30 20 tOFF 10 0 0 2 4 6 8 10 12 14 tON V+ - Positive Supply Voltage (V) rDS(on) vs. VD and Temperature Switching Time vs. Positive Supply Voltage Document Number: 71342 S-71241-Rev. E, 25-Jun-07 www.vishay.com 7 DG408L/409L Vishay Siliconix TYPICAL CHARACTERISTICS 25 C, unless otherwise noted 10 40 35 0 Leakage Current (pA) Switching Speed (nS) IS(off) 30 tON 25 20 tOFF 15 10 - 30 5 - 40 -5 0 -3 -1 1 3 5 3 4 5 6 VD, V S - Analog Voltage (V) tTRANS - 10 ID(off) ID(on) - 20 - Dual Power Supply Voltage (V) Leakage Current vs. Analog Voltage 1.0 CL = 1000 pF 0.8 V+ = 12 V V- = 0 V 0.6 Loss (dB) - 10 10 Switching Time vs. Dual Power Supply Voltage Q - Charge Injection (pC) - 30 V+ = 3 V V- = 0 V RL = 50 Insertion Loss - 3 dB = 280 MHz - 50 Off Isolation 0.4 V+ = 5 V V- = - 5 V 0.2 V+ = 5 V V- = 0 V - 70 Crosstalk - 90 0.0 -5 - 110 0 5 10 0.1 1 10 Frequency (MHz) 100 1000 VS - Source Voltage (V) Charge Injection vs. Analog Voltage Insertion Loss, Off Isolation and Crosstalk vs. Frequency (Single Supply) 35 CD, CS - Drain/Source Capacitance (pF) 35 CD, CS - Drain/Source Capacitance (pF) 30 25 20 15 10 CS(off) 5 0 0 2 4 6 8 10 12 CD(off) V+ = 12 V V- = 0 V CD(on) CD(on) 30 25 20 CD(off) 15 10 CS(off) 5 0 -5 V+ = 5 V V- = - 5 V -4 -3 -2 -1 0 1 2 3 4 5 Drain/Source Capacitance vs. Analog Voltage Drain/Source Capacitance vs. Analog Voltage www.vishay.com 8 Document Number: 71342 S-71241-Rev. E, 25-Jun-07 DG408L/409L Vishay Siliconix SCHEMATIC DIAGRAM (TYPICAL CHANNEL) V+ GND D A0 V+ VAX Level Shift Decode/ Drive S1 V+ EN Sn V- Figure 1. TEST CIRCUITS V+ V+ A2 A1 50 3V A0 EN GND V300 VVS1 V+ Switch Output VO A1 A0 50 3V EN GND V300 V35 pF S1b S1a - S4a, Da V+ S4b Db VS1 VS8 VSB4 VO tTRANS S1 ON S8 ON (DG408L) or S4 ON (DG409L) tTRANS 50 % 90 % 90 % 35 pF S1 S2 - S7 VS1 DG408L S8 D VS8 VO Logic Input VAX 3V 50 % 0V tr < 20 ns tf < 20 ns DG409L Figure 2. Transition Time Document Number: 71342 S-71241-Rev. E, 25-Jun-07 www.vishay.com 9 DG408L/409L Vishay Siliconix TEST CIRCUITS V+ V+ S1 EN A0 A1 A2 GND 50 VV+ Switch Output V+ S1b EN A0 A1 GND 50 VS1a - S4a, Da S2b - S4b VS1 VO 90 % VO VS2 - S8 VS1 DG408L D 300 VO 35 pF Logic Input 3V 50 % 0V tON(EN) 0V tOFF(EN) 10 % tr < 20 ns tf < 20 ns DG409L Db V300 VO 35 pF Figure 3. Enable Switching Time bbm.5 3V EN V+ All S and Da A0 A1 A2 GND 50 4/9 VS1 Logic Input 3V 50 % 0V tr < 20 ns tf < 20 ns DG408L DG409L Db, D V300 Switch Output 35 pF VO 0V tOPEN VO VS 80 % V- Figure 4. Break-Before-Make Interval www.vishay.com 10 Document Number: 71342 S-71241-Rev. E, 25-Jun-07 DG408L/409L Vishay Siliconix TEST CIRCUITS V+ Rg SX EN Vg Channel Select A0 A1 A2 GND V+ Logic Input D VO CL 1 nF VSwitch Output 3V OFF 0V ON OFF VO VO is the measured voltage due to charge transfer error Q, when the channel turns off. Q = CL x VO V- Figure 5. Charge Injection V+ V+ VIN VS Rg = 50 SX S8 A0 A1 A2 GND V+ VIN VS D RL 1 k VO S1 SX S8 A0 V+ D RL 1 k Rg = 50 VO A1 A2 GND EN V- EN V- VOff Isolation = 20 log VOUT VIN VCrosstalk = 20 log VOUT VIN Figure 6. Off Isolation Figure 7. Crosstalk V+ V+ VS Rg = 50 A0 A1 A2 GND EN VRL 1 k D VO S1 V+ V+ A2 Channel Select A1 A0 S1 Meter S8 HP4192A Impedance Analyzer or Equivalent f = 1 MHz D GND VInsertion Loss = 20 log VOUT VIN EN V- V- Figure 8. Insertion Loss Figure 9. Source Drain Capacitance Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?71342. Document Number: 71342 S-71241-Rev. E, 25-Jun-07 www.vishay.com 11 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1 |
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